1. Field of the Invention
The present invention relates to an information processing apparatus and to a method of controlling the same.
2. Description of the Related Art
An image forming apparatus such as a multifunction peripheral has a copy function that can be executed independently and a print function for printing an image based on image data sent from a host apparatus such as a host computer. Such an image forming apparatus is equipped with a plurality of units comprising a CPU and memory in order to support advanced functionality and these functions are implemented by utilizing copying of data from memory, etc. Usually a DMA controller is used in order to speed up data copying.
For example, the specification of Japanese Patent Laid-Open No. 03-139751 proposes a technique whereby communication data is transmitted upon being split into a predetermined burst size in DMA transfer. More specifically, the order of priority of all DMA transfer requests is determined whenever a single transfer ends, and DMA transfer is carried out upon changing over to a channel having a high priority. The efficiency of data transfer is improved by repeating this processing.
Further, the specification of Japanese Patent Laid-Open No. 2004-208094 proposes a system having a DMA unit for transferring pixel data from a memory to an image compressing unit, the image compressing unit and a DMA unit for transferring compressed code from the image compressing unit to the memory. With this system, the units of data processing by each of the plurality of DMA units and compressing unit is not fixed and control is exercised independently to thereby prevent a decline in memory utilization efficiency.
Further, as a method of generating an image in an image forming apparatus, the specification of Japanese Patent Laid-Open No. 2003-281078 proposes a technique in which two DMA controllers are used when an image is processed in band units and delivered in DMA output. More specifically, one of the DMA controllers is used in the development (memory write) of an expanded image, and the other DMA controller is used in readout (memory read) of the image that has been developed in memory. Thus, two DMA controllers are used and the two DMA controllers, which are operating in parallel, are controlled by a pause bit utilizing descriptor information that has been stored in an external memory, whereby image processing is executed efficiently without reversing the memory write and memory read operations.
However, the following problem arises with the prior art described above. For example, although a method of using a plurality of DMA controllers has been proposed, processing is executed on the assumption that both of the DMA controllers have the same transfer performance, and a case where transfer performance differs owing to the connections and arrangement is not taken into consideration. In a case where a plurality of DMA controllers operate, there are instances where the performance of each the DMA controllers differs depending upon memory type, that is, transfer source or transfer destination, transfer path and transfer direction. With the prior art, however, the DMA controllers cannot be used at optimum performance since the assumption is that the performances of the DMA controllers are identical.